MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 354

• Manufacturer Part Number: MC908LJ12CFUE
• Description: IC MCU 12K FLASH 4/8MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ12CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
17.6 Port D
17.6.1 Port D Data Register (PTD)
Technical Data
354
NOTE:
NOTE:
Alternative Function:
Address:
Port D is an 8-bit special function port that shares four of its pins with
serial peripheral interface (SPI) module and four of its pins with the
keyboard interrupt module (KBI).
Port D is not available in a 52-pin LQFP.
The port D data register contains a data latch for each of the eight port D
pins.
Bit 0–bit 7 of PTD are not available in a 52-pin LQFP.
PTD[7:0] — Port D Data Bits
SS, MISO, MOSI, and SPSCK — SPI functional pins
Reset:
Read:
Write:
These read/write bits are software programmable. Data direction of
each port D pin is under the control of the corresponding bit in data
direction register D. Reset has no effect on port D data.
These are the chip select, master-input-slave-output, master-output-
slave-input and clock pins for the SPI module. The SPI enable bit,
SPE, in the SPI control register, SPCR, enables these pins as the SPI
functional pins and overrides any control from port I/O logic. See
Section 14. Serial Peripheral Interface Module
$0003
PTD7
KBI7
Bit 7
Figure 17-12. Port D Data Register (PTD)
Input/Output (I/O) Ports
PTD6
KBI6
6
PTD5
KBI5
5
Unaffected by reset
PTD4
KBI4
4
SPSCK
PTD3
3
MC68HC908LJ12
PTD2
MOSI
Freescale Semiconductor
2
(SPI).
PTD1
MISO
1
—
Rev. 2.1
PTD0
Bit 0
SS