MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 377

• Manufacturer Part Number: MC908LJ12CFUE
• Description: IC MCU 12K FLASH 4/8MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ12CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

21.1 Contents
21.2 Introduction
21.3 Features
MC68HC908LJ12
Freescale Semiconductor
Technical Data — MC68HC908LJ12
—
Rev. 2.1
21.2
21.3
21.4
21.4.1
21.4.2
21.4.3
21.4.4
21.5
21.6
21.6.1
21.6.2
This section describes the low-voltage inhibit (LVI) module, which
monitors the voltage on the V
voltage falls below the LVI trip falling voltage, V
Features of the LVI module include:
•
•
•
Programmable LVI interrupt and reset
Selectable LVI trip voltage
Programmable stop mode operation
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
LVI Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 382
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .378
Interrupt LVI Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . 380
Forced Reset Operation . . . . . . . . . . . . . . . . . . . . . . . . . . .380
Voltage Hysteresis Protection . . . . . . . . . . . . . . . . . . . . . . 380
LVI Trip Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .382
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .382
Section 21. Low-Voltage Inhibit (LVI)
Low-Voltage Inhibit (LVI)
DD
pin and can force a reset when the V
TRIPF
.
Technical Data
DD
377