MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 220

• Manufacturer Part Number: MC908LJ12CFUE
• Description: IC MCU 12K FLASH 4/8MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ12CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Real Time Clock (RTC)
Technical Data
220
ALMF — Alarm Flag
CHRF — Chronograph Flag
DAYF — Day Flag
HRF — Hour Flag
This clearable, read-only bit is set when the value in the RTC hour and
minute counters matches the value in the alarm hour and alarm
minute registers. When the ALMIE bit in RTCCR1 is set, ALMF
generates a CPU interrupt request. In normal operation, clear the
ALMF bit by reading RTCSR with ALMF set and then reading the
alarm hour register (ALHR). Reset clears ALMF.
This clearable, read-only bit is set on every tick of the chronograph
counter (every counter count). The tick is on every 1/100 or 1/128
seconds (see
in RTCCR1 is set, CHRF generates a CPU interrupt request. In
normal operation, clear the CHRF bit by reading RTCSR with CHRF
set and then reading the chronograph data register (CHRR). Reset
clears CHRF.
This clearable, read-only bit is set on every increment of the day
counter. When the DAYIE bit in RTCCR1 is set, DAYF generates a
CPU interrupt request. In normal operation, clear the DAYF bit by
reading RTCSR with DAYF set and then reading the day register
(DAYR). Reset clears DAYF.
This clearable, read-only bit is set on every increment of the hour
counter. When the HRIE bit in RTCCR1 is set, HRF generates a CPU
interrupt request. In normal operation, clear the HRF bit by reading
RTCSR with HRF set and then reading the hour register (HRR). Reset
clears HRF.
1 = RTC hour and minute counters matches the
0 = No matching between hour and minute counters and alarm
1 = A chronograph counter tick has occurred
0 = No chronograph counter tick has occurred
1 = Day counter incremented
0 = No day counter incremented
1 = Hour counter incremented
0 = No hour counter incremented
alarm hour and minute registers
hour and minute registers
Real Time Clock (RTC)
12.4.5 Chronograph
Functions). When the CHRIE bit
MC68HC908LJ12
Freescale Semiconductor
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Rev. 2.1