MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 109

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MC68HC908MR16CFU

Manufacturer Part Number
MC68HC908MR16CFU
Description
IC MCU 8MHZ 16K FLASH 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908MR16CFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
44
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number:
MC68HC908MR16CFU
Manufacturer:
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10.6.2 Data Direction Register E
Data direction register E (DDRE) determines whether each port E pin is an input or an output. Writing a
logic 1 to a DDRE bit enables the output buffer for the corresponding port E pin; a logic 0 disables the
output buffer.
DDRE[7:0] — Data Direction Register E Bits
Figure 10-15
When bit DDREx is a logic 1, reading address $0008 reads the PTEx data latch. When bit DDREx is a
logic 0, reading address $0008 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Freescale Semiconductor
These read/write bits control port E data direction. Reset clears DDRE[7:0], configuring all port E pins
as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
DDRE Bit
Address:
0
1
shows the port E I/O logic.
Reset:
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Read:
Write:
READ DDRE ($000C)
WRITE DDRE ($000C)
WRITE PTE ($0008)
READ PTE ($0008)
DDRE7
$000C
PTE Bit
Bit 7
0
X
X
(1)
Figure 10-14. Data Direction Register E (DDRE)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
DDRE6
6
0
I/O Pin Mode
Input, Hi-Z
Table 10-5. Port E Pin Functions
RESET
Figure 10-15. Port E I/O Circuit
Output
DDRE5
5
0
(2)
Table 10-5
DDRE4
NOTE
DDREx
PTEx
4
0
Accesses to DDRE
Read/Write
DDRE[7:0]
DDRE[7:0]
DDRE3
summarizes the operation of the port E pins.
3
0
DDRE2
2
0
PTE[7:0]
Read
DDRE1
Pin
Accesses to PTE
1
0
DDRE0
Bit 0
PTE[7:0]
PTE[7:0]
0
PTEx
Write
(3)
Port E
109

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