MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 39

• Manufacturer Part Number: MC68HC908MR16CFU
• Description: IC MCU 8MHZ 16K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR16CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

HVEN — High-Voltage Enable Bit
MASS — Mass Erase Control Bit
ERASE — Erase Control Bit
PGM — Program Control Bit
2.8.2 FLASH Page Erase Operation
Use this step-by-step procedure to erase a page (128 bytes) of FLASH memory.
In applications that require more than 1000 program/erase cycles, use the 4 ms page erase specification
to get improved long-term reliability. Any application can use this 4 ms page erase specification. However,
in applications where a FLASH location will be erased and reprogrammed less than 1000 times, and
speed is important, use the 1 ms page erase specification to get a shorter cycle time.
Freescale Semiconductor
10. After time, t
1. Set the ERASE bit and clear the MASS bit in the FLASH control register.
2. Read the FLASH block protect register.
3. Write any data to any FLASH location within the address range of the block to be erased.
4. Wait for a time, t
5. Set the HVEN bit.
6. Wait for a time, t
7. Clear the ERASE bit.
8. Wait for a time, t
9. Clear the HVEN bit.
This read/write bit enables the charge pump to drive high voltages for program and erase operations
in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for
program or erase is followed.
Setting this read/write bit configures the 32-Kbyte FLASH array for mass erase operation. Mass erase
is disabled if any FLASH block is protected
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be equal to 1 or set to 1 at the same time.
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
1 = MASS erase operation selected
0 = MASS erase operation unselected
1 = Erase operation selected
0 = Erase operation unselected
1 = Program operation selected
0 = Program operation unselected
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps.
RCV
(typical 1 µs), the memory can be accessed in read mode again.
NVS
Erase
NVH
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
(minimum 10 µs).
(minimum 5 µs).
(minimum 1 ms or 4 ms).
NOTE
FLASH Memory (FLASH)
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