MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 123

• Manufacturer Part Number: MC68HC908MR16CFU
• Description: IC MCU 8MHZ 16K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR16CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

For ease of software, the LDFQx bits are buffered. When the LDFQx bits are changed, the reload
frequency will not change until the previous reload cycle is completed. See
PWMINT enables CPU interrupt requests as shown in
requests are generated when the PWMF bit is set. When the PWMINT bit is clear, PWM interrupt requests
are inhibited. PWM reloads will still occur at the reload rate, but no interrupt requests will be generated.
To prevent a partial reload of PWM parameters from occurring while the software is still calculating them,
an interlock bit controlled from software is provided. This bit informs the PWM module that all the PWM
parameters have been calculated, and it is “okay” to use them. A new modulus, prescaler, and/or PWM
value cannot be loaded into the PWM module until the LDOK bit in PWM control register 1 is set. When
the LDOK bit is set, these new values are loaded into a second set of registers and used by the PWM
generator at the beginning of the next PWM reload cycle as shown in
Figure
Freescale Semiconductor
12-10, and
When reading the LDFQx bits, the value is the buffered value (for example,
not necessarily the value being acted upon).
When the PWM module is enabled (via the PWMEN bit), a load will occur
if the LDOK bit is set. Even if it is not set, an interrupt will occur if the
PWMINT bit is set. To prevent this, the software should clear the PWMINT
bit before enabling the PWM module.
RELOAD
Figure
PWM RELOAD
12-11. After these values are loaded, the LDOK bit is cleared.
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
RELOAD
CHANGE RELOAD
EVERY 4 CYCLES
FREQUENCY TO
Figure 12-6. Reload Frequency Change
Figure 12-7. PWM Interrupt Requests
V
DD
RELOAD
D
CK
LATCH
RESET
NOTE
NOTE
CHANGE RELOAD
FREQUENCY TO
EVERY CYCLE
Figure
PWMF
PWMINT
12-7. When this bit is set, CPU interrupt
RELOAD RELOADRELOADRELOAD
Figure
CPU INTERRUPT
REQUEST
Figure
WRITE PWMF AS 0
READ PWMF AS 1,
12-8,
RESET
OR
12-6.
Figure
PWM Generators
12-9,
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