MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 142

• Manufacturer Part Number: MC68HC908MR16CFU
• Description: IC MCU 8MHZ 16K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR16CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Pulse-Width Modulator for Motor Control (PWMMC)
12.7 Initialization and the PWMEN Bit
For proper operation, all registers should be initialized and the LDOK bit should be set before enabling
the PWM via the PWMEN bit. When the PWMEN bit is first set, a reload will occur immediately, setting
the PWMF flag and generating an interrupt if PWMINT is set. In addition, in complementary mode, PWM
value registers 1, 3, and 5 will be used for the first PWM cycle if current sensing is selected.
When PWMEN is set, the PWM pins change from high impedance to outputs. At this time, assuming no
fault condition is present, the PWM pins will drive according to the PWM values, polarity, and dead-time.
See the timing diagram in
When the PWMEN bit is cleared, this will occur:
When PWMEN is cleared, these features remain active:
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PWM pins will be three-stated unless OUTCTL = 1.
PWM counter is cleared and will not be clocked.
Internally, the PWM generator will force its outputs to 0 to avoid glitches when the PWMEN is set
again.
All fault circuitry
Manual PWM pin control via the PWMOUT register
Dead-time insertion when PWM pins change via the PWMOUT register
PWM PINS
CPU CLOCK
PWMEN
If the LDOK bit is not set when PWMEN is set after a RESET, the prescaler
and PWM values will be 0, but the modulus will be unknown. If the LDOK
bit is not set after the PWMEN bit has been cleared then set (without a
RESET), the modulus value that was last loaded will be used.
If the dead-time register (DEADTM) is changed after PWMEN or OUTCTL
is set, an improper dead-time insertion could occur. However, the
dead-time can never be shorter than the specified value.
Because of the equals-comparator architecture of this PWM, the modulus
= 0 case is considered illegal. Therefore, the modulus register is not reset,
and a modulus value of 0 will result in waveforms inconsistent with the other
modulus waveforms. See
The PWMF flag and pending CPU interrupts are NOT cleared when
PWMEN = 0.
Figure
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
HI-Z IF OUTCTL = 0
Figure 12-32. PWMEN and PWM Pins
12-32.
12.9.2 PWM Counter Modulo
VALUE, POLARITY, AND DEAD-TIME
NOTE
NOTE
DRIVE ACCORDING TO PWM
Registers.
HI-Z IF OUTCTL = 0
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