MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 54

• Manufacturer Part Number: MC68HC908MR16CFU
• Description: IC MCU 8MHZ 16K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908MR16CFU

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Analog-to-Digital Converter (ADC)
3.7.2 ADC Data Register High
In left justified mode, this 8-bit result register holds the eight MSBs of the 10-bit result. This register is
updated each time an ADC single channel conversion completes. Reading ADRH latches the contents of
ADRL until ADRL is read. Until ADRL is read, all subsequent ADC results will be lost.
In right justified mode, this 8-bit result register holds the two MSBs of the 10-bit result. All other bits read
as 0. This register is updated each time a single channel ADC conversion completes. Reading ADRH
latches the contents of ADRL until ADRL is read. Until ADRL is read, all subsequent ADC results will be
lost.
3.7.3 ADC Data Register Low
In left justified mode, this 8-bit result register holds the two LSBs of the 10-bit result. All other bits read as
0. This register is updated each time a single channel ADC conversion completes. Reading ADRH latches
the contents of ADRL until ADRL is read. Until ADRL is read, all subsequent ADC results will be lost.
In right justified mode, this 8-bit result register holds the eight LSBs of the 10-bit result. This register is
updated each time an ADC conversion completes. Reading ADRH latches the contents of ADRL until
ADRL is read. Until ADRL is read, all subsequent ADC results will be lost.
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Address:
Address:
Address:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 3-6. ADC Data Register High (ADRH) Right Justified Mode
Figure 3-5. ADC Data Register High (ADRH) Left Justified Mode
Figure 3-7. ADC Data Register Low (ADRL) Left Justified Mode
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Bit 7
AD9
Bit 7
Bit 7
AD1
R
R
R
R
R
R
0
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
= Reserved
= Reserved
= Reserved
AD8
AD0
R
R
R
6
6
0
6
AD7
R
R
R
5
5
0
5
0
Unaffected by reset
Unaffected by reset
Unaffected by reset
AD6
R
R
R
4
4
0
4
0
AD5
R
R
R
3
3
0
3
0
AD4
R
R
R
2
2
0
2
0
AD3
AD9
R
R
R
1
1
1
0
Freescale Semiconductor
Bit 0
AD2
Bit 0
AD8
Bit 0
R
R
R
0