MC68HC908MR16CFU Freescale Semiconductor, MC68HC908MR16CFU Datasheet - Page 152

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MC68HC908MR16CFU

Manufacturer Part Number
MC68HC908MR16CFU
Description
IC MCU 8MHZ 16K FLASH 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908MR16CFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
44
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908MR16CFU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC908MR16CFUE
Manufacturer:
ALTERA
Quantity:
101
Pulse-Width Modulator for Motor Control (PWMMC)
12.9.9 Fault Status Register
The fault status register (FSR) is a read-only register that indicates the current fault status.
FPIN4 — State of Fault Pin 4 Bit
FFLAG4 — Fault Event Flag 4
FPIN3 — State of Fault Pin 3 Bit
FFLAG3 — Fault Event Flag 3
FPIN2 — State of Fault Pin 2 Bit
FFLAG2 — Fault Event Flag 2
FPIN1 — State of Fault Pin 1 Bit
152
This read-only bit allows the user to read the current state of fault
pin 4.
The FFLAG4 event bit is set within two CPU cycles after a rising edge on fault pin 4. To clear the
FFLAG4 bit, the user must write a 1 to the FTACK4 bit in the fault acknowledge register.
This read-only bit allows the user to read the current state of fault
pin 3.
The FFLAG3 event bit is set within two CPU cycles after a rising edge on fault pin 3. To clear the
FFLAG3 bit, the user must write a 1 to the FTACK3 bit in the fault acknowledge register.
This read-only bit allows the user to read the current state of fault pin 2.
The FFLAG2 event bit is set within two CPU cycles after a rising edge on fault pin 2. To clear the
FFLAG2 bit, the user must write a 1 to the FTACK2 bit in the fault acknowledge register.
This read-only bit allows the user to read the current state of fault pin 1.
1 = Fault pin 4 is at logic 1.
0 = Fault pin 4 is at logic 0.
1 = A fault has occurred on fault pin 4.
0 = No new fault on fault pin 4
1 = Fault pin 3 is at logic 1.
0 = Fault pin 3 is at logic 0.
1 = A fault has occurred on fault pin 3.
0 = No new fault on fault pin 3.
1 = Fault pin 2 is at logic 1.
0 = Fault pin 2 is at logic 0.
1 = A fault has occurred on fault pin 2.
0 = No new fault on fault pin 2
1 = Fault pin 1 is at logic 1.
0 = Fault pin 1 is at logic 0.
Address:
Reset:
Read:
Write:
FPIN4
$0023
Bit 7
U
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Figure 12-44. Fault Status Register (FSR)
= Unimplemented
FFLAG4
6
0
FPIN3
U
5
U = Unaffected
FFLAG3
4
0
FPIN2
U
3
FFLAG2
2
0
FPIN1
U
1
Freescale Semiconductor
FFLAG1
Bit 0
0

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