PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 13

• Manufacturer Part Number: PPC8567EVTAUJJ
• Description: MCU PWRQUICC III 1023-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of PPC8567EVTAUJJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.333GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

The core voltage must always be provided at nominal 1.1V. (See
voltage). Voltage to the processor interface I/Os are provided through separate sets of supply pins and must
be provided at the voltages shown in
associated I/O supply voltage. OV
appropriate LVCMOS type specifications. The DDR SDRAM interface uses a single-ended differential
receiver referenced the externally supplied MV
the SSTL2 electrical signaling standard.
2.1.3
Table 4
preliminary estimates.
2.2
The MPC8568E requires its power rails to be applied in specific sequence in order to ensure proper device
operation. These requirements are as follows for power up:
All supplies must be at their stable values within 50 ms.
Freescale Semiconductor
Local bus interface utilities signals
PCI signals
DDR signal
DDR2 signal
eTSEC 10/100/1000 signals
DUART, system control, JTAG
I2C
Notes:
1. The drive strength of the local bus interface is determined by the configuration of the appropriate bits in PORIMPSCR.
2. The drive strength of the PCI interface is determined by the setting of the PCI_GNT[1] signal at reset.
1. V
2. GV
provides information on the characteristics of the output driver strengths. The values are
DD
Power Sequencing
DD
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
Output Driver Characteristics
, AV
DD
Driver Type
_n, BV
DD
, SCOREV
DD
Table 4. Output Drive Capability
Table
and LV
DD
3. The input voltage threshold scales with respect to the
, LV
DD
REF
based receivers are simple CMOS I/O circuits and satisfy
DD
, TV
signal (nominally set to GV
32 (half strength mode)
Output Impedance
Programmable
DD
42 (default)
45(default)
45(default)
, XV
150
(Ω)
25
25
25
20
42
16
42
DD
Table 3
, OV
DD
for actual recommended core
L/TV
DD
GV
GV
OV
BV
BV
BV
BV
OV
OV
/2) as is appropriate for
DD
Voltage
Supply
DD
DD
DD
DD
DD
DD
DD
DD
DD
= 2.5/3.3 V
Electrical Characteristics
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
= 3.3 V
= 2.5 V
= 1.8 V
= 3.3 V
= 3.3 V
Notes
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1
2
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