PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 37

• Manufacturer Part Number: PPC8567EVTAUJJ
• Description: MCU PWRQUICC III 1023-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of PPC8567EVTAUJJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.333GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

8.2.5
When the eTSEC is configured for TBI modes, all clocks are supplied from external sources to the relevant
eTSEC interface. In single-clock TBI mode, when TBICON[CLKSEL] = 1 a 125-MHz TBI receive clock
is supplied on TSECn TSECn_RX_CLK pin (no receive clock is used on TSECn_TX_CLK in this mode,
whereas for the dual-clock mode this is the PMA1 receive clock). The 125-MHz transmit clock is applied
on the TSEC_GTX_CLK125 pin in all TBI modes.
A summary of the single-clock TBI mode AC specifications for receive appears in
A timing diagram for TBI receive appears in
8.2.6
Table 34
Freescale Semiconductor
At recommended operating conditions with LV
.
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock period duration
RX_CLK clock period
RX_CLK duty cycle
RX_CLK peak-to-peak jitter
Rise time RX_CLK (20%–80%)
Fall time RX_CLK (80%–20%)
RCG[9:0] setup time to RX_CLK rising edge
RCG[9:0] hold time to RX_CLK rising edge
presents the RGMII and RTBI AC timing specifications.
RX_CLK
RCG[9:0]
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
TBI Single-Clock Mode AC Specifications
RGMII and RTBI AC Timing
Parameter/Condition
Parameter/Condition
Table 33. TBI single-clock Mode Receive AC Timing Specification
3
Figure 17. TBI Single-Clock Mode Receive AC Timing Diagram
t
TRRH
Table 34. RGMII and RTBI AC Timing Specifications
DD
2
t
TRR
of 2.5 V ± 5%.
t
TRRDV
Figure
valid data
Specifications
Symbol
Symbol
t
t
t
t
t
TRRDV
TRRDX
t
t
t
SKRGT
t
TRRH
TRRR
17.
SKRGT
TRRF
t
TRRJ
t
TRR
RGT
TRRDX
5
5
1
Min
7.5
2.0
1.0
40
—
—
—
t
TRRF
–500
Min
1.0
7.2
6
Typ
Ethernet Interface and MII Management
8.0
1.0
1.0
50
—
—
—
Typ
8.0
—
0
t
TRRR
Table
Max
250
8.5
2.0
2.0
60
—
—
500
Max
2.8
8.8
33.
6
Unit
ns
ps
ns
ns
ns
ns
%
Unit
ps
ns
ns
37