PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 85

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PPC8567EVTAUJJ

Manufacturer Part Number
PPC8567EVTAUJJ
Description
MCU PWRQUICC III 1023-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of PPC8567EVTAUJJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.333GHz
Voltage
1.1V
Mounting Type
Surface Mount
Package / Case
1023-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Freescale Semiconductor
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects.
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects.
Characteristic
Characteristic
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
1
1
Table 63. Receiver AC Timing Specifications—3.125 GBaud
Table 62. Receiver AC Timing Specifications—2.5 GBaud
V
J
J
J
S
BER
UI
V
J
J
J
S
BER
UI
D
DR
T
D
DR
T
IN
MI
IN
MI
Symbol
Symbol
200
0.37
0.55
0.65
400
200
0.37
0.55
0.65
320
Min
Min
Range
Range
1600
24
10
400
1600
22
10
320
–12
-12
Max
Max
Figure
Figure
mV p-p
UI p-p
UI p-p
UI p-p
ns
ps
mV p-p
UI p-p
UI p-p
UI p-p
ns
ps
Unit
Unit
54. The sinusoidal jitter component
54. The sinusoidal jitter component
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
Skew at the receiver input
between lanes of a multilane
link
+/– 100 ppm
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
Skew at the receiver input
between lanes of a multilane
link
+/- 100 ppm
Notes
Notes
Serial RapidIO
85

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