PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 34

• Manufacturer Part Number: PPC8567EVTAUJJ
• Description: MCU PWRQUICC III 1023-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of PPC8567EVTAUJJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.333GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

At recommended operating conditions with L/TV
Ethernet Interface and MII Management
Figure 13
Figure 14
8.2.4
This section describes the TBI transmit and receive AC timing specifications.
34
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise (20%-80%)
RX_CLK clock fall time (80%-20%)
Note:
1. The symbols used for timing specifications herein follow the pattern of t
2. Guaranteed by design.
for inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of t
with the appropriate letter: R (rise) or F (fall).
provides the AC test load for eTSEC.
shows the MII receive AC timing diagram.
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
TBI AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Parameter/Condition
RXD[3:0]
RX_CLK
RX_DV
RX_ER
Output
Table 30. MII Receive AC Timing Specifications (continued)
MRX
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
Figure 14. MII Receive AC Timing Diagram
t
t
MRXH
MRDVKH
DD
MRX
Figure 13. eTSEC AC Test Load
of 3.3 V ± 5%.
t
MRX
clock reference (K) going to the low (L) state or hold time. Note that, in general,
Z
MRDXKL
0
= 50 Ω
Valid Data
symbolizes MII receive timing (GR) with respect to the time data input
Symbol
t
t
t
MRXF
MRDVKH
MRDXKH
t
t
MRXR
MRXF
for outputs. For example, t
2
2
(first two letters of functional block)(signal)(state) (reference)(state)
1
R
t
MRDXKL
t
L
MRXR
= 50 Ω
10.0
10.0
Min
1.0
1.0
LV
DD
Typ
MRDVKH
—
—
—
—
/2
MRX
Freescale Semiconductor
symbolizes MII receive
clock reference (K)
Max
4.0
4.0
—
—
Unit
ns
ns
ns
ns