PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 131

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PPC8567EVTAUJJ

Manufacturer Part Number
PPC8567EVTAUJJ
Description
MCU PWRQUICC III 1023-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of PPC8567EVTAUJJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.333GHz
Voltage
1.1V
Mounting Type
Surface Mount
Package / Case
1023-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Each circuit should be placed as close as possible to the specific AV
noise coupled from nearby circuits. It should be possible to route directly from the capacitors to the AV
type pin, which is on the periphery of 1023FC-PBGA the footprint, without the inductance of vias.
Figure 73
The AV
the internal clock, the power supplied to the PLL is filtered using a circuit similar to the one shown in
following figure. For maximum effectiveness, the filter circuit is placed as closely as possible to the
AV
capacitor is closest to the ball, followed by the 2.2-µF capacitors, and finally the 1 ohm resistor to the board
supply plane. Use ceramic chip capacitors with the highest possible self-resonant frequency. All traces
should be kept short, wide and direct.
Note the following:
25.3
Due to large address and data buses, and high operating frequencies, the device can generate transient
power surges and high frequency noise in its power supply, especially while driving large capacitive loads.
MPC8568E system, and the device itself requires a clean, tightly regulated source of power. Therefore, it
is recommended that the system designer place at least one decoupling capacitor at each V
BV
power from separate V
utilizing short traces to minimize inductance. Capacitors may be placed directly under the device using a
standard escape pattern. Others may surround the part.
Freescale Semiconductor
DD_SRDS
DD
, OV
AV
The transmitter output signals on the SerDes interface are fed from the XV
Power: XVDD consumes less than 300mW. SCOREVDD + AV
750mW.
DD_SRDS
Decoupling Recommendations
shows the PLL power supply filter circuits for all PLLs except SerDes PLL.
DD_SRDS
DD
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
and AGND_SRDS ball to ensure it filters out as much noise as possible. The 0.003-µF
, GV
signal provides power for the analog portions of the SerDes PLL. To ensure stability of
SCOEVDD
DD
V
should be a filtered version of SCOREVDD.
DD
, and LV
DD,
1. An 0805 sized capacitor is recommended for system initial bring-up.
Figure 73. MPC8568E PLL Power Supply Filter Circuit
TV
DD
DD
Figure 74. SerDes PLL Power Supply Filter
10 Ω
, BV
pin of the device. These decoupling capacitors should receive their
1.0 Ω
DD
, OV
2.2 μF
DD
2.2 μF
AGND_SRDS
, GV
GND
1
DD
2.2 μF
Low ESL Surface Mount Capacitors
, and LV
2.2 μF
1
0.003 μF
DD
DD
AV
and GND power planes in the PCB,
type pin being supplied to minimize
DD
DD_SRDS
AV
DD_SRDS
consumes less than
DD
System Design Information
power plan.
DD
, TV
DD
,
DD
131

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