PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 84

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PPC8567EVTAUJJ

Manufacturer Part Number
PPC8567EVTAUJJ
Description
MCU PWRQUICC III 1023-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of PPC8567EVTAUJJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.333GHz
Voltage
1.1V
Mounting Type
Surface Mount
Package / Case
1023-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Serial RapidIO
15.7
LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8)*(Baud Frequency). This includes contributions from
on-chip circuitry, the chip package and any off-chip components related to the receiver. AC coupling
components are included in this requirement. The reference impedance for return loss measurements is
100 Ω resistive for differential return loss and 25 Ω resistive for common mode.
84
Differential Input Voltage
Deterministic Jitter Tolerance
Combined Deterministic and Random
Jitter Tolerance
Total Jitter Tolerance
Multiple Input Skew
Bit Error Rate
Unit Interval
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
sinusoidal jitter may have any amplitude and frequency in the unshaded region of
is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects.
Receiver Specifications
Characteristic
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
1.25 GBaud short range
1.25 GBaud long range
2.5 GBaud short range
2.5 GBaud long range
3.125 GBaud short range
3.125 GBaud long range
1
Table 60. Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
Table 61. Receiver AC Timing Specifications—1.25 GBaud
V
J
J
J
S
BER
UI
D
DR
T
IN
MI
Symbol
200
0.37
0.55
0.65
800
V
DIFF
(mV)
250
400
250
400
250
400
Min
min
Range
V
1600
24
10
800
DIFF
(mV)
–12
500
800
500
800
500
800
Max
max
Figure
mV p-p
UI p-p
UI p-p
UI p-p
ns
ps
A (UI)
0.175
0.175
0.175
0.175
0.175
0.175
Unit
54. The sinusoidal jitter component
Measured at receiver
Measured at receiver
Measured at receiver
Measured at receiver
Skew at the receiver input
between lanes of a multilane
link
+/– 100 ppm
B (UI)
0.39
0.39
0.39
0.39
0.39
0.39
Freescale Semiconductor
Notes

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