PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 79

• Manufacturer Part Number: PPC8567EVTAUJJ
• Description: MCU PWRQUICC III 1023-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of PPC8567EVTAUJJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.333GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

15.2
Table 50
15.3
LP-Serial links use differential signaling. This section defines terms used in the description and
specification of differential signals.
waveforms for either a transmitter output (TD and TD) or a receiver input (RD and RD). Each signal
swings between A Volts and B Volts where A > B. Using these waveforms, the definitions are as follows:
Freescale Semiconductor
Symbol
t
t
REFCJ
REFPJ
t
REF
7. The transmitter output signals and the receiver input signals TD, TD, RD and RD each have a
8. The differential output signal of the transmitter, V
9. The differential input signal of the receiver, V
10. The differential output signal of the transmitter and the differential input signal of the receiver
11. The peak value of the differential transmitter output signal and the differential receiver input
12. The peak-to-peak value of the differential transmitter output signal and the differential receiver
peak-to-peak swing of A – B Volts
each range from A – B to –(A – B) Volts
signal is A – B Volts
input signal is 2 * (A – B) Volts
A Volts
B Volts
REFCLK cycle time
REFCLK cycle-to-cycle jitter. Difference in the
period of any two adjacent REFCLK cycles
Phase jitter. Deviation in edge location with
respect to mean edge location
lists AC requirements.
AC Requirements for Serial RapidIO SD_REF_CLK and
SD_REF_CLK
Signal Definitions
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
Parameter Description
Figure 52. Differential Peak-Peak Voltage of Transmitter or Receiver
Table 53. SD_REF_CLK and SD_REF_CLK AC Requirements
TD or RD
TD or RD
Figure 52
Differential Peak-Peak = 2 * (A-B)
shows how the signals are defined. The figures show
Min
–40
—
—
ID
Typical Max Units
10(8)
, is defined as V
—
—
OD
, is defined as V
80
40
—
ns
ps
ps
RD
8 ns applies only to serial RapidIO
with 125-MHz reference clock
-V
TD
RD
–V
TD
Comments
—
—
Serial RapidIO
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