PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 17

• Manufacturer Part Number: PPC8567EVTAUJJ
• Description: MCU PWRQUICC III 1023-FCPBGA
• Manufacturer: Freescale Semiconductor

Specifications of PPC8567EVTAUJJ

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.333GHz
• Voltage: 1.1V
• Mounting Type: Surface Mount
• Package / Case: 1023-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

4.4
Table 9
the MPC8568E.
4.5
Note the following FIFO maximum speed restrictions based on the platform speed.
For FIFO GMII mode:
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no higher
than 127 MHz.
For FIFO encoded mode:
For example, if the platform frequency is 533 MHz, the FIFO TX/RX clock frequency should be no higher
than 167 MHz
4.6
For information on the input clocks of other functional blocks of the platform such as SerDes, and eTSEC,
see the specific section of this document.
Freescale Semiconductor
FIFO TX/RX clock frequency <= platform clock frequency / 4.2
EC_GTX_CLK125 frequency
EC_GTX_CLK125 cycle time
EC_GTX_CLK125 rise and fall time
EC_GTX_CLK125 duty cycle
Notes:
1. Timing is guaranteed by design and characterization.
2. EC_GTX_CLK125 is used to generate the GTX clock for the eTSEC transmitter with 2% degradation.
3. Rise and fall times for EC_GTX_CLK125 are measured from 0.5 and 2.0 V for L/TVDD = 2.5 V, and from 0.6 and 2.7
FIFO TX/RX clock frequency <= platform clock frequency / 3.2
EC_GTX_CLK125 duty cycle can be loosened from 47/53% as long as the PHY device can tolerate the duty cycle
generated by the eTSEC GTX_CLK. See
for 10Base-T and 100Base-T reference clock.
V for L/TVDD = 3.3 V.
provides the eTSEC gigabit reference clocks (EC_GTX_CLK125) AC timing specifications for
eTSEC Gigabit Reference Clock Timing
FIFO Clock Speed Restrictions
Other Input Clocks
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
Parameter/Condition
1000Base-T for RGMII, RTBI
Table 9. EC_GTX_CLK125 AC Timing Specifications
L/TVDD = 2.5 V
L/TVDD = 3.3 V
GMII, TBI
Section 8.2.6, “RGMII and RTBI AC Timing
t
G125R,
t
G125H
Symbol
f
t
G125
G125
/t
t
G125F
G125
Min
—
—
—
—
45
47
Typical
125
—
—
—
8
Specifications,” for duty cycle
Max
0.75
1.0
55
53
—
—
MHz
Unit
ns
ns
%
Notes
Input Clocks
1, 2
—
—
—
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