PPC8567EVTAUJJ Freescale Semiconductor, PPC8567EVTAUJJ Datasheet - Page 61

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PPC8567EVTAUJJ

Manufacturer Part Number
PPC8567EVTAUJJ
Description
MCU PWRQUICC III 1023-FCPBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of PPC8567EVTAUJJ

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.333GHz
Voltage
1.1V
Mounting Type
Surface Mount
Package / Case
1023-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Figure 38
13 High-Speed Serial Interfaces (HSSI)
The MPC8568E features one Serializer/Deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications. It can be used for PCI Express and/or Serial RapidIO data transfers.
This section describes the common portion of SerDes DC electrical specifications, which is the DC
requirement for SerDes Reference Clocks. The SerDes data lane’s transmitter and receiver reference
circuits are also shown.
13.1
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 39
description. The figure shows waveform for either a transmitter output (SD_TX and SD_TX) or a receiver
input (SD_RX and SD_RX). Each signal swings between A Volts and B Volts where A > B.
Using this waveform, the definitions are as follows. To simplify illustration, the following definitions
assume that the SerDes transmitter and receiver operate in a fully symmetrical differential signaling
environment.
Freescale Semiconductor
1. Single-Ended Swing
2. Differential Output Voltage, V
3. Differential Input Voltage, V
the two complimentary output voltages: V
or negative.
The Differential Output Voltage (or Swing) of the transmitter, V
each have a peak-to-peak swing of A – B Volts. This is also referred as each signal wire’s
Single-Ended Swing.
The transmitter output signals and the receiver input signals SD_TX, SD_TX, SD_RX and SD_RX
Signal Terms Definition
shows the PCI output AC timing conditions.
shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1
High-Impedance
Figure 38. PCI Output AC Timing Measurement Condition
Output Delay
Output
CLK
ID
OD
(or Differential Input Swing):
(or Differential Output Swing):
SD_TX
t
PCKHOZ
t
PCKHOV
– V
SD_TX.
The V
OD
OD
, is defined as the difference of
value can be either positive
High-Speed Serial Interfaces (HSSI)
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