W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 152

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

In PS/2 Model 30 mode, the bit definitions for this register are as follows:
11.2.3 Digital Output Register (DO Register) (Write base address + 2)
The Digital Output Register is a write-only register that controls drive motors, drive selection,
DRQ/IRQ enable, and FDC reset. The bit definitions are as follows:
DEFAULT
DEFAULT
BIT
7-6
1-0
BIT
7-5
1-0
NAME
NAME
5
4
3
2
4
3
2
BIT
BIT
RESERVED.
DSA#. This bit indicates the status of the DSA# output pin.
WD F/F. This bit indicates the complement of the WD# output pin, which is latched on
every rising edge of the WD# output pin.
RDATA F/F. This bit indicates the complement of the latched RDATA# output pin.
WE F/F. This bit indicates the complement of the latched WE# output pin.
RESERVED.
RESERVED.
MOTOR ENABLE A. Motor A on when active high.
DMA & INT ENABLE. An active high signal enables DRQ/IRQ.
FDC RESET. Floppy Disk Controller Reset. An active low signal resets the FDC.
DRIVE SELECT.
Bits
1 0
0 0: Select Drive A.
0 1: Reserved.
1 0: Reserved.
1 1: Reserved.
7
0
7
0
RESERVED
RESERVED
6
1
6
0
DSA#
5
1
5
0
W83627DHG-P/W83627DHG-PT
ENABLE
DESCRIPTION
MOTOR
DESCRIPTION
WD F/F
-142-
4
0
4
A
0
ENABLE
RDATA
DMA &
F/F
INT
3
0
3
0
Publication Release Date: July 09, 2009
WE F/F
RESET
FDC
2
0
2
0
DRIVE SELECT
1
1
1
0
RESERVED
Version 1.94
0
1
0
0