W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 30

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

5.12.3 GPIO-3 Interface
VSBGATE#
RSTOUT2#
RSTOUT3#
RSTOUT4#
FTPRST#
PWROK2
SYMBOL
ATXPGD
SYMBOL
SUSC#
GP30
GP31
GP32
GP33
GP34
GP35
GP36
GP37
SCL
SDA
KDAT
GP26
GP27
KCLK
PIN
92
91
90
89
88
87
69
64
PIN
63
62
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
OD
O
O
IN
O
O
I/O
IN
IN
IN
I/OD
I/OD
I/OD
I/OD
12
12
12
12
ts
12
12ts
t
t
t
12t
12t
12t
12t
12t
12t
12t
12t
I/O
16ts
16ts
16t
16t
General-purpose I/O port 3 bit 0.
This pin generates the PWROK2 signal while 3VCC comes in.
General-purpose I/O port 3 bit 1.
Switch 3VSB power to memory when in S3 state. The default is
disabled while the particular ACPI functions are enabled. The
control bit is at Logical Device A, CR [E4h] bit 4.
General-purpose I/O port 3 bit 2.
PCI Reset Buffer 2. (Default)
Serial Bus clock.
General-purpose I/O port 3 bit 3.
PCI Reset Buffer 3. (Default)
Serial bus bi-directional Data.
General-purpose I/O port 3 bit 4.
PCI Reset Buffer 4. (Default)
General-purpose I/O port 3 bit 5.
ATX power good input signal. It is connected to the PWROK
signal from the power supply for PWROK/PWROK2 generation.
The default is enabled.
General-purpose I/O port 3 bit 6.
Connect to the reset button. This pin has internal de-bounce
circuit whose de-bounce time is at least 32 mS.
General-purpose I/O port 3 bit 7.
SLP_S5# input.
General-purpose I/O port 2 bit 6.
Keyboard Data.
General-purpose I/O port 2 bit 7.
Keyboard Clock.
W83627DHG-P/W83627DHG-PT
-20-
DESCRIPTION
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94