W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 186

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

15. POWER MANAGEMENT EVENT
The PME# (pin 86) signal is connected to the South Bridge and is used to wake up the system from
S1 ~ S5 sleeping states.
One control bit and four registers in the W83627DHG-P are associated with the PME function. The
control bit is at Logical Device A, CR [F2h], bit [0] and is for enabling or disabling the PME function. If
this bit is set to “0”, the W83627DHG-P won’t output any PME signal when any of the wake-up events
has occurred and is enabled. The four registers are divided into PME status registers and PME
interrupt registers of wake-up events
1) The PME status registers of wake-up event:
2) The PME interrupt registers of wake-up event:
Note.1
Note.2
states.
PME wake-up events that the W83627DHG-P supports include:
All the above support both S0 and S1 states. Events with the “*” mark also support S3 and S5
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At Logical Device A, CR [F3h] and CR [F4h]
Each wake-up event has its own status
The PME status should be cleared by writing a “1” before enabling its corresponding bit in
the PME interrupt registers
At Logical Device A, CR [F6h] and CR [F7h]
Each wake-up event can be enabled / disabled individually to generate a PME# signal
Mouse IRQ event *
Keyboard IRQ event *
GP30, GP31, and GP35 events *
Printer IRQ event
Floppy IRQ event
UART A IRQ event
UART B IRQ event
Hardware Monitor IRQ event
WDTO# event
RIB (UARTB Ring Indicator) event
Note.1
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W83627DHG-P/W83627DHG-PT
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Publication Release Date: July 09, 2009
Version 1.94