W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 237

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

CR 30h. (Default 00h)
CR 60h, 61h. (Default 00h, 00h)
CR 70h. (Default 00h)
CR F0h. (VID Control Register; Default 81h)
21.12 Logical Device B (Hardware Monitor)
7~1
7~0
7~4
3~0
BIT
BIT
BIT
BIT
0
7
6
5
4
3
2
1
0
Reserved.
Reserved.
Reserved.
READ / WRITE
READ / WRITE
READ / WRITE
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
0: Logical device is inactive.
1: Logical device is active.
These two registers select the HM base address <100h : FFEh> along a
two-byte boundary.
These bits select the IRQ resource for HM.
VID I/O Control
0: VID output mode.
1: VID input mode.
VIDAMD input level select
0: VID is GTL level.
1: VID is AMD VRM level.
0: Disable AUXFANIN1 input de-bouncer.
1: Enable AUXFANIN1 input de-bouncer.
0: Disable CPUFANIN1 input de-bouncer.
1: Enable CPUFANIN1 input de-bouncer.
0: Disable AUXFANIN0 input de-bouncer.
1: Enable AUXFANIN0 input de-bouncer.
0: Disable CPUFANIN0 input de-bouncer.
1: Enable CPUFANIN0 input de-bouncer.
0: Disable SYSFANIN input de-bouncer.
1: Enable SYSFANIN input de-bouncer.
W83627DHG-P/W83627DHG-PT
-227-
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94