W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 195

no-image

W83627DHG-PT

Manufacturer Part Number
W83627DHG-PT
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG-PT

Pin Count
128
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W83627DHG-PT
Manufacturer:
NUVOTON
Quantity:
20 000
Part Number:
W83627DHG-PT
0
16. SERIALIZED IRQ
The W83627DHG-P supports a serialized IRQ scheme. This allows a signal line to be used to report
the parallel interrupt requests. Since more than one device may need to share the signal serial
SERIRQ signal, an open drain signal scheme is employed. The clock source is the PCI clock. The
serialized interrupt is transferred on the SERIRQ signal, one cycle consisting of three frames types:
the Start Frame, the IRQ/Data Frame, and the Stop Frame.
There are two modes of operation for the SERIRQ Start Frame: Quiet mode and Continuous mode.
In the Quiet mode, the W83627DHG-P drives the SERIRQ signal active low for one clock, and then tri-
states it. This brings all the state machines of the W83627DHG-P from idle to active states. The host
controller (the South Bridge) then takes over driving SERIRQ signal low in the next clock and
continues driving the SERIRQ low for programmable 3 to 7 clock periods. This makes the total number
of clocks low 4 to 8 clock periods. After these clocks, the host controller drives the SERIRQ high for
one clock and then tri-states it.
In the Continuous mode, the START Frame can only be initiated by the host controller to update the
information of the IRQ/Data Frame. The host controller drives the SERIRQ signal low for 4 to 8 clock
periods. Upon a reset, the SERIRQ signal is defaulted to the Continuous mode for the host controller
to initiate the first Start Frame.
Please see the diagram below for more details.
PCICLK
SER IRQ
Drive Source
H=Host Control
Note:
1. The Start Frame pulse can be 4-8 clocks wide.
2. The first clock of Start Frame is driven low by the W83627DHG-P because IRQ1 of the
16.1 Start Frame
W83627DHG-P needs an interrupt request. Then the host takes over and continues to pull the
SERIRQ low.
IRQ1
SL
or
H
Start Frame Timing with source sampled a low pulse on IRQ1.
2
SL=Slave Control
START
Host Controller
START FRAME
H
1
R
W83627DHG-P/W83627DHG-PT
T
IRQ0 FRAME
-185-
S
None
R=Recovery
R
T
IRQ1 FRAME
S
IRQ1
Publication Release Date: July 09, 2009
T=Turn-around
R
T
SMI# FRAME
S
None
R
T
Version 1.94
S=Sample

Related parts for W83627DHG-PT