W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 163

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

BDLAB = 0
BDLAB = 0
BDLAB = 0
BDLAB = 1
BDLAB = 1
Register Address Base
+ 0
+ 0
+ 1
+ 2
+ 2
+ 3
+ 4
+ 5
+ 6
+ 7
+ 0
+ 1
*: Bit 0 is the least significant bit. The least significant bit is the first bit serially transmitted or received.
**: These bits are always 0 in 16450 Mode.
Interrupt Control
Interrupt Status
Status Register
Buffer Register
UART Control
UART Status
User Defined
Divisor Latch
Divisor Latch
(Read Only)
(Read Only)
(Write Only)
UART FIFO
(Write Only)
Transmitter
Handshake
Handshake
Receiver
Baudrate
Baudrate
Register
Register
Register
Register
Register
Register
Register
Register
Control
Control
Buffer
High
Low
RBR
UFR
UCR
HCR
USR
HSR
UDR
TBR
BHL
ICR
BLL
ISR
RBR Data
RBR Data
RX Data
TX Data
Terminal
Interrupt
(ERDRI)
Interrupt
Toggling
Pending
(TCTS)
Enable
Enable
(DLS0)
Length
Ready
Select
Ready
Ready
(RDR)
(DTR)
FIFO
Data
Data
Bit 0
Bit 0
"0" if
Bit 0
CTS
Bit 0
Bit 0
Bit 8
0
Table 12-1 Register Summary for UART
(ETBREI)
RX Data
Interrupt
Interrupt
Request
Toggling
TX Data
Overrun
(TDSR)
Enable
(DLS1)
Length
Empty
Status
RCVR
Select
(OER)
Bit (0)
Reset
(RTS)
Send
FIFO
Error
Bit 1
Bit 1
TBR
Data
Bit 1
DSR
Bit 1
Bit 1
Bit 9
to
1
W83627DHG-P/W83627DHG-PT
Loopback
RI Falling
Stop Bits
Parity Bit
RX Data
Interrupt
TX Data
(EUSRI)
Interrupt
Multiple
(MSBE)
(PBER)
Enable
Enable
(FERI)
Status
Bit (1)
Reset
Bit 10
XMIT
Edge
FIFO
Input
Error
Bit 2
Bit 2
Bit 2
Bit 2
USR
-153-
RI
2
Bit Number
RX Data
Toggling
TX Data
Interrupt
(EHSRI)
Interrupt
No Stop
Bit (2)**
(NSER)
(TDCD)
Enable
Enable
Enable
Status
Select
(PBE)
Mode
Parity
Bit 11
DMA
Error
DCD
Bit 3
Bit 3
HSR
Bit 3
Bit 3
IRQ
Bit
Bit
3
Publication Release Date: July 09, 2009
Reserved
Loopback
Detected
RX Data
TX Data
to Send
Internal
Enable
Enable
(EPE)
(SBD)
(CTS)
Parity
Silent
Bit 12
Clear
Even
Bit 4
Bit 4
Byte
Bit 4
Bit 4
4
0
0
Reversed
RX Data
TX Data
Bit Fixed
Data Set
(TBRE)
Enable
PBFE)
Empty
Ready
(DSR)
Parity
Bit 13
Bit 5
Bit 5
TBR
Bit 5
Bit 5
5
0
0
0
Version 1.94
Active Level
RX Data
Indicator
TX Data
Enabled
Interrupt
Silence
(TSRE)
Enable
Empty
FIFOs
(SSE)
(LSB)
Bit 14
TSR
Ring
Bit 6
Bit 6
Bit 6
Bit 6
(RI)
RX
Set
**
6
0
0
Data Carrier
Active Level
Access Bit
Indication
RX Data
Baudrate
(RFEI) **
(BDLAB)
RX FIFO
TX Data
Enabled
Interrupt
Divisor
Detect
(DCD)
FIFOs
(MSB)
Bit 15
Latch
Error
Bit 7
Bit 7
Bit 7
Bit 7
RX
**
7
0
0