W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 28

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

The Advanced Configuration and Power Interface (ACPI) is an interface that allows OS-directed
Power Management (OSPM). The ACPI replaces the APM (Advanced Power Management), MPS
(Multiprocessor Specification), and PnP BIOS Specification. In addition to power management, the
ACPI supports the functions of thermal management, state management, and speed control, as well
as the global system states and different device power states. Two of the primary states that the
W83627DHG-P supports are the S0 (working) and S3 (suspend to RAM) states. S0 is a full-power
state, in which the computer is actively used. S3 is a sleeping state, in which the processor is powered
down, but the memory, where the last procedural state is stored, is still active. By employing the ACPI,
the system conserves more energy through transiting unused devices into lower power states,
including placing the entire system in a low-power state when possible.
5.10 Advanced Configuration and Power Interface
RSTOUT0#
RSTOUT1#
RSTOUT2#
RSTOUT3#
RSTOUT4#
RSMRST#
SYMBOL
PSOUT#
PWROK
SUSB#
PSON#
PSIN#
GP56
GP57
GP51
GP32
GP33
GP34
GP52
GP53
GP54
SCL
SDA
PIN
68
67
75
73
72
71
94
93
90
89
88
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
OD
OD
OD
OD
OD
IN
O
O
IN
O
O
I/O
IN
12
12
12
12
tu
ts
12
12
12
12
t
12
12ts
12t
12t
12t
12t
12t
12t
12t
12t
12t
Panel Switch Input.
up resistor.
General-purpose I/O port 5 bit 6.
Panel Switch Output. This signal is used to wake-up the
system from S3/S5 state.
General-purpose I/O port 5 bit 7.
Resume reset signal output.
General-purpose I/O port 5 bit 1.
System S3 state input.
General-purpose I/O port 5 bit 2.
Power supply on-off output.
General-purpose I/O port 5 bit 3.
This pin generates the PWROK signal while 3VCC comes in.
General-purpose I/O port 5 bit 4.
PCI Reset Buffer 0.
PCI Reset Buffer 1.
PCI Reset Buffer 2. (Default)
General-purpose I/O port 3 bit 2.
Serial Bus clock.
PCI Reset Buffer 3. (Default)
General-purpose I/O port 3 bit 3.
Serial bus bi-directional Data.
PCI Reset Buffer 4. (Default)
General-purpose I/O port 3 bit 4.
W83627DHG-P/W83627DHG-PT
-18-
This pin is active-low with an internal pulled-
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94