W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 160

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

11.2.9 Configuration Control Register (CC Register) (Write base address + 7)
This register is used to control the data rate. In PC/AT and PS/2 mode, the bit definitions are as
follows:
In the PS/2 Model 30 mode, the bit definitions are as follows:
DEFAULT
DEFAULT
BIT
7-2
BIT
7-3
NAME
NAME
1
0
2
1
0
BIT
BIT
RESERVED. These bits should be set to 0.
DRATE1.
DRATE0.
RESERVED. These bits should be set to 0.
NOPREC. This bit disables the precompensation function. It can be set by the software.
DRATE1.
DRATE0.
NA
NA
7
7
NA
NA
6
6
RESERVED
NA
NA
5
5
RESERVED
W83627DHG-P/W83627DHG-PT
DESCRIPTION
DESCRIPTION
-150-
NA
NA
4
4
These two bits select data rate of the FDC.
See DR register bits 1 and 0 (Data Rate
Register (DR Register) (Write base address
+ 4)) for how the settings correspond to
individual data rates.
These two bits select the data rate of the
FDC. See DR register bits 1 and 0 (Data
Rate Register (DR Register) (Write base
address + 4)) for how the settings
correspond to individual data rates.
NA
NA
3
3
Publication Release Date: July 09, 2009
NOPREC
NA
2
2
0
DRATE1
DRATE1
1
1
1
1
Version 1.94
DRATE0
DRATE0
0
0
0
0