W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 176

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W83627DHG-PT

Manufacturer Part Number
W83627DHG-PT
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG-PT

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Quantity
Price
Part Number:
W83627DHG-PT
Manufacturer:
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20 000
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W83627DHG-PT
0
13.3.5 CFIFO (Parallel Port Data FIFO) Mode = 010
This mode is defined only for the forward direction. Bytes written or DMAed to this FIFO are
transmitted by a hardware handshake to the peripheral using the standard parallel port protocol.
Transfers to the FIFO are byte-aligned.
13.3.6 ECPDFIFO (ECP Data FIFO) Mode = 011
When the direction bit is 0, bytes written or DMAed to this FIFO are transmitted by a hardware
handshake to the peripheral using the ECP parallel port protocol. Transfers to the FIFO are byte-
aligned.
When the direction bit is 1, data bytes from the peripheral are read via automatic hardware handshake
from ECP into this FIFO. Reads or DMAs from the FIFO return bytes of ECP data to the system.
13.3.7 TFIFO (Test FIFO Mode) Mode = 110
Data bytes may be read, written, or DMAed to or from the system to this FIFO in any direction. Data in
the tFIFO is not transmitted to the parallel port lines. However, data in the tFIFO may be displayed on
the parallel port data lines.
13.3.8 CNFGA (Configuration Register A) Mode = 111
This register is a read-only register. When it is read, 10h is returned indicating an 8-bit implementation.
13.3.9 CNFGB (Configuration Register B) Mode = 111
The bit definitions are as follows:
DEFAULT
BIT
7-6
NAME
5
4
3
2
1
0
BIT
RESERVED. These two bits are always read as logical 1 and cannot be written.
DIRECTOR. If the mode is 000 or 010, this bit has no effect and the direction is always
out. In other modes,
0: The parallel port is in the output mode.
1: The parallel port is in the input mode.
ACKINEN. Interrupt Request Enable. When this bit is set to logical 1, it enables interrupt
requests from the parallel port to the CPU on the low-to-high transition on ACK#.
SELECTIN. This bit is inverted and output to the SLIN# output.
0: The printer is not selected.
1: The printer is selected.
NINIT. This bit is output to the INIT# output.
AUTOFD. This bit is inverted and output to the AFD# output.
STROBE. This bit is inverted and output to the STB# output.
COMPRESS
7
0
INTROVALUE
6
0
IRQX2
W83627DHG-P/W83627DHG-PT
5
0
DESCRIPTION
-166-
IRQX1
4
0
IRQX0
Publication Release Date: July 09, 2009
3
0
2
1
RESERVED
1
1
Version 1.94
0
1

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