W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 231

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

CR E4h. (Default 00h)
CR E5h. (GPIOs Reset Source Register; Default 00))
7~ 5
BIT
6~5
1~0
BIT
BIT
1
0
4
3
2
7
4
3
2
Reserved.
READ / WRITE
Reserved
Reserved.
READ / WRITE
READ / WRITE
Read-Clear
Read-Clear
Read Only
Read Only
R / W
R / W
R / W
R / W
R / W
R / W
R / W
MSWAKEUP_STS => The bit is latched by the mouse wake-up event.
0: No mouse wake-up event issued.
1: Mouse wake-up event issued.
KBWAKEUP_STS => The bit is latched by the keyboard wake-up event.
0: No keyboard wake-up event issued.
1: Keyboard wake-up event issued.
Power-loss control bits => (VBAT)
00: System always turns off when it returns from power-loss state.
01: System always turns on when it returns from power-loss state.
10: System turns off / on when it returns from power-loss state depending
11: User defines the state before power loss.(i.e. the last state set of
VSBGATE# Enable bit =>
0: Disable.
1: Enable.
Keyboard wake-up options. (LRESET#)
0: Password or sequence hot keys programmed in the registers.
1: Any key.
Enable the hunting mode for all wake-up events set in CRE0. This bit is
cleared when any wake-up events is captured. (LRESET#)
0: Disable.
1: Enable.
VID_MRST
0: VID reset by LRESET#.
1: VID reset by PWROK.
GP23_MRST
0: GP23 reset by LRESET#.
1: GP23 reset by PWROK.
GP22_MRST
0: GP22 reset by LRESET#.
1: GP22 reset by PWROK.
on the state before the power loss.
CRE6[4])
W83627DHG-P/W83627DHG-PT
-221-
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94