W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 25

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W83627DHG-PT

Manufacturer Part Number
W83627DHG-PT
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG-PT

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Part Number:
W83627DHG-PT
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The SPI employs a master-slave model and typically has three signal lines: serial data input line (SI),
serial data output line (SO), and serial clock line (SCK). Different slaves are addressed on the bus by
chip select signals from the master. The data bits are first shifted in/out the most significant bit (MSB).
The data are often shifted simultaneously out from the output pin and into the input pin. Among the
parameters, only the communication lines and the clock edge are defined by the SPI. The others differ
from device to device.
SPI Operation
To initiate the data transfer between the W83627DHG-P and a slave device, SCE# must go low. This
synchronizes the slave device with the W83627DHG-P. Data can now be transferred between the
W83627DHG-P and the slave device in one of two modes: the data is sampled either on the rising or
the falling edge of the clock.
In a slave device, a logic low is received on the SCE# line and the clock input is at the SCK pin, which
synchronizes the slave with the W83627DHG-P. Data is then received serially at the SI pin. During a
write cycle, data is shifted out to the SO pin on clocks from the W83627DHG-P.
5.6
AUXFANIN1
SYMBOL
SYMBOL
KBRST#
MDAT
MCLK
KCLK
KDAT
SCE#
BEEP
GP27
GP26
GP25
GP24
GP22
GP23
SCK
SO
Serial Peripheral Interface
SI
118
PIN
PIN
60
62
63
65
66
19
58
2
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/OD
I/O
OD
IN ts
O
O
O
I/O
I/O
O
12ts
12
12
12
8
16ts
16ts
16ts
16ts
16t
16t
16t
16t
12t
12t
8
Keyboard reset. This pin is high after system reset. (KBC P20)
Keyboard Clock.
General-purpose I/O port 2 bit 7.
Keyboard Data.
General-purpose I/O port 2 bit 6.
PS2 Mouse Clock.
General-purpose I/O port 2 bit 5.
PS2 Mouse Data.
General-purpose I/O port 2 bit 4.
Serial flash ROM interface chip selection.
General-purpose I/O port 2 bit 2.
Clock output for serial flash.
General-purpose I/O port 2 bit 3.
Transfer commands, addresses or data to serial flash. This pin
is connected to SI of serial flash.
Beep function for hardware monitor. This pin is low after
system reset.
Receive data from serial flash. This pin is connected to SO of
serial flash.
0 to +3 V amplitude fan tachometer input.
W83627DHG-P/W83627DHG-PT
-15-
DESCRIPTION
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94

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