W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 23

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W83627DHG-PT

Manufacturer Part Number
W83627DHG-PT
Description
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83627DHG-PT

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Quantity
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Part Number:
W83627DHG-PT
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Quantity:
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Part Number:
W83627DHG-PT
0
PENROM
PENKBC
SYMBOL
HEFRAS
SOUTA
DCDA#
DSRA#
DTRA#
RTSA#
CTSA#
GP60
GP61
GP62
GP63
GP64
GP65
GP66
SINA
RIA#
PIN
57
56
54
53
52
51
50
49
I/O
I/OD
I/OD
I/OD
I/OD
I/O
I/O
I/O
IN
INt
IN
IN
IN
IN
IN
IN
O
O
O
8
8
8
8
t
t
t
t
t
t
t
8
8
12t
12t
12t
12t
Ring Indicator. An active-low signal indicates that a ring signal is
being received from the modem or the data set.
General-purpose I/O port 6 bit 0.
Data Carrier Detection. An active-low signal indicates the modem
or data set has detected a data carrier.
General-purpose I/O port 6 bit 1.
UART A Serial Output. This pin is used to transmit serial data out
to the communication link.
During power on reset, this pin is pulled down internally and is
defined as PENKBC, and the power-on values are shown at
CR24 bit 2. The PCB layout should reserve space for a 1-kΩ
resistor to pull down this pin to ensure the disabling of KBC, and
a 1-kΩ resistor is recommended to pull the pin up If wish to
enable KBC.
General-purpose I/O port 6 bit 2.
Serial Input. This pin is used to receive serial data through the
communication link.
General-purpose I/O port 6 bit 3.
UART A Data Terminal Ready. An active-low signal informs the
modem or data set that the controller is ready to communicate.
During power-on reset, this pin is pulled down internally and is
defined as PENROM disabled, and the power-on values are
shown at CR24 bit 1 (ENROM). The PCB layout should reserve
space for a 1-kΩ resistor to pull down this pin to ensure the
disabling of SPI interface, and a 1-kΩ resistor is recommended to
pull the pin up if wish to enable ROM.
General-purpose I/O port 6 bit 4.
UART A Request To Send. An active-low signal informs the
modem or data set that the controller is ready to send data.
During power-on reset, this pin is pulled down internally and is
defined as HEFRAS, which provides the power-on value for
CR26 bit 6 (HEFRAS). The PCB layout should reserve space for
a 1-kΩ resistor to pull down this pin so as to ensure the selection
of I/O port’s configuration address to 2EH, and a 1-kΩ resistor is
recommended to pull it up if 4EH is selected as I/O port′s
configuration address.
General-purpose I/O port 6 bit 5.
Data Set Ready. An active-low signal indicates the modem or
data set is ready to establish a communication link and transfer
data to the UART.
General-purpose I/O port 6 bit 6.
Clear To Send. This is the modem-control input. The function of
these pins can be tested by reading bit 4 of the handshake status
register.
W83627DHG-P/W83627DHG-PT
-13-
DESCRIPTION
Publication Release Date: July 09, 2009
Version 1.94

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