W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 209

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

21.2
CR 30h. (Default 01h)
CR 60h, 61h. (Default 03h,F0h)
CR 70h. (Default 06h)
CR 74h. (Default 02h)
CR F0h. (Default 8Eh)
7~1
7~0
7~4
3~0
7~3
2~0
3~2
BIT
BIT
BIT
BIT
BIT
0
7
6
5
4
1
Logical Device 0 (FDC)
Reserved.
Reserved.
Reserved.
Reserved.
READ / WRITE
READ / WRITE
READ / WRITE
READ / WRITE
READ / WRITE
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
R / W
0: Logical device is inactive.
1: Activate the logical device.
These two registers select FDC I/O base address <100h: FF8h> on 8
bytes boundary.
These bits select IRQ resource for FDC.
These bits select DRQ resource for FDC.
000: DMA0.
1xx: No DMA active.
This bit determines the polarity of all FDD interface signals.
0: FDD interface signals are active low.
1: FDD interface signals are active high.
When this bit is logic 0, indicates a second drive is installed and is
reflected in status register A. (PS2 mode only)
Swap Drive 0, 1 Mode =>
0: No Swap.
Interface Mode.
FDC DMA Mode.
W83627DHG-P/W83627DHG-PT
001: DMA1.
-199-
1: Drive and Motor select 0 and 1 are swapped.
00: Model 30.
10: Reserved.
0: Burst Mode is enabled
1: Non-Burst Mode.
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
010: DMA2.
Publication Release Date: July 09, 2009
011: DMA3.
01: PS/2.
11: AT Mode
Version 1.94