W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 174

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

The mode selection bits are bits 7-5 of the Extended Control Register.
13.3.1 ECP Register and Bit Map
The next two tables list the registers used in the ECP mode and provide a bit map of the parallel port
and ECP registers.
Note: The base addresses are specified by CR60 and 61, which are determined by the configuration register or the hardware
setting.
Notes:
1. These registers are available in all modes.
2. All FIFOs use one common 16-byte FIFO.
Each register (or pair of registers, in some cases) is discussed below.
Data
ecpAFifo
Dsr
Dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
Ecr
MODE
011
100
101
110
111
ecpAFifo
ecpDFifo
NAME
cnfgA
cnfgB
cFifo
data
tFifo
dsr
dcr
ecr
Parallel Port Data FIFO
ECP Data FIFO
Test FIFO
MODE
compress
Addr/RLE
nBusy
PD7
D7
0
1
EPP mode (If this option is enabled in the CRF0h to select ECP/EPP mode)
Base+001h
Base+002h
Base+402h
Base+000h
Base+000h
Base+400h
Base+400h
Base+400h
Base+400h
Base+401h
ADDRESS
Address or RLE field
intrValue
nAck
PD6
D6
0
1
Table 13-6 Bit Map of the ECP Registers
Table 13-5 ECP Register Addresses
Directio
PError
PD5
D5
0
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
I/O
R
R
W83627DHG-P/W83627DHG-PT
ECP Parallel Port mode
nErrIntrEn
ackIntEn
Configuration mode
Select
PD4
D4
1
-164-
1
ECP MODES
DESCRIPTION
Test mode
000-001
Reserved
011
010
011
110
111
111
All
All
All
SelectIn
dmaEn
nFault
PD3
D3
0
1
Publication Release Date: July 09, 2009
serviceIntr
Data Register
ECP FIFO (Address)
Status Register
Control Register
Parallel Port Data FIFO
ECP FIFO (DATA)
Test FIFO
Configuration Register A
Configuration Register B
Extended Control Register
PD2
nInit
D2
1
0
1
Autofd
FUNCTION
PD1
D1
full
1
0
1
strobe
empty
PD0
D0
1
1
0
Version 1.94
NOTE
2
1
1
2
2
2