W83627DHG-PT Nuvoton Technology Corporation of America, W83627DHG-PT Datasheet - Page 193

• Manufacturer Part Number: W83627DHG-PT
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627DHG-PT

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

t3
Note.
Additionally, the ATXPGD signal, too, is used to control the generation of PWROK and PWROK2. In
Figure
generation. However, ATXPGD is still inactive after t2; therefore the delay time before the rising edge
of PWROK and PWROK2 are t2 plus Td. The length of Td is based on when the ATXPGD signal is
active. Once 3VCC falls below “V4” or the ATXPGD signal is inactive, PWROK and PWROK2 de-
assert immediately.
In
PWROK2 assert after t2. The timing of t2 starts when 3VCC voltage rises to “V3”. No matter the
ATXPGD signal activation is during or after t2, PWROK and PWROK2 assert or de-assert according
to the 3VCC voltage and the ATXPGD signal.
PWROK/PWROK2
(output)
ATXPGD(input)
PWROK/PWROK2
3VCC
Figure
FTPRST#
SYMBOL
3VCC
15-8, the 3VCC voltage rises to “V3”, and then starts a delay – “t2” for PWROK and PWROK2
1. The values above are the worst-case results of R&D simulation
2. The length of T
15-9, the 3VCC voltage rises to “V3”, and the ATXPGD is active during t2, so PWROK and
V3
FTPRST# active to PWROK active
t2
L
Td
level is based on the length of the low level of FTPRST#
PARAMETER
W83627DHG-P/W83627DHG-PT
Figure 15-7
Figure 15-8
Table 15-6
PWROK/PWROK2 are
active when both 3VCC
and ATXPGD are valid
t3
-183-
T
L
T
L
28
MIN
Publication Release Date: July 09, 2009
39
MAX
V4
mS
UNIT
PWROK/PWROK2
are inactive when
either 3VCC or
ATXPGD is invalid
Version 1.94