s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 112

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s908gz60cfa

Manufacturer Part Number
s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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External Interrupt (IRQ)
When an interrupt pin is both falling-edge and low-level triggered (MODE = 1), the interrupt remains set
until both of these events occur:
The vector fetch or software clear may occur before or after the interrupt pin returns to a high level. As
long as the pin is low, the interrupt request remains pending. A reset will clear the latch and the MODE
control bit, thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR masks all external interrupt requests. A latched interrupt request
is not presented to the interrupt priority logic unless the IMASK bit is clear.
112
$001D
Addr.
Vector fetch or software clear
Return of the interrupt pin to a high level
IRQ
IRQ Status and Control
Register Name
Register (INTSCR)
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests.
DECODER
V
VECTOR
See page 114.
FETCH
DD
RESET
ACK
INTERNAL
PULLUP
DEVICE
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Reset:
Read:
Write:
Figure 8-1. IRQ Module Block Diagram
Figure 8-2. IRQ I/O Register Summary
V
MODE
DD
Bit 7
0
0
D
CK
CLR
= Unimplemented
Q
6
0
0
NOTE
5
0
0
IMASK
SYNCHRONIZER
4
0
0
VOLTAGE
DETECT
HIGH
IRQF
3
0
ACK
2
0
0
IRQF
Freescale Semiconductor
IMASK
1
0
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
MODE
Bit 0
0

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