s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 56

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s908gz60cfa

Manufacturer Part Number
s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Memory
A. Programming and erasing of FLASH locations can not be performed by code being executed from the
B. While these operations must be performed in the order shown, other unrelated operations may occur
C. It is highly recommended that interrupts be disabled during program/erase operations.
2.7.5 FLASH-2 Page Erase Operation
Use this step-by-step procedure to erase a page (128 bytes) of FLASH-2 memory:
A. Programming and erasing of FLASH locations can not be performed by code being executed from the
B. While these operations must be performed in the order shown, other unrelated operations may occur
C. It is highly recommended that interrupts be disabled during program/erase operations.
In applications that require more than 1000 program/erase cycles, use the 4 ms page erase specification
to get improved long-term reliability. Any application can use this 4 ms page erase specification. However,
in applications where a FLASH location will be erased and reprogrammed less than 1000 times, and
speed is important, use the 1 ms page erase specification to get a shorter cycle time.
56
10. Wait for a time, t
10. Wait for a time, t
8. Wait for a time, t
9. Clear the HVEN bit.
1. Set the ERASE bit and clear the MASS bit in the FLASH-2 control register (FL2CR).
2. Read the FLASH-2 block protect register (FL2BPR).
3. Write any data to any FLASH-2 address within the address range of the page (128 byte block) to
4. Wait for time, t
5. Set the HVEN bit.
6. Wait for time, t
7. Clear the ERASE bit.
8. Wait for time, t
9. Clear the HVEN bit.
same FLASH array.
between the steps. However, care must be taken to ensure that these operations do not access any
address within the FLASH array memory space such as the COP control register (COPCTL) at
$FFFF.
same FLASH array.
between the steps. However, care must be taken to ensure that these operations do not access any
address within the FLASH array memory space such as the COP control register (COPCTL) at
$FFFF.
be erased.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
NVS
ERASE
NVH
RCV
RCV
NVHL
(minimum 10 μs).
(minimum 5 μs).
, (typically 1 μs) after which the memory can be accessed in normal read mode.
, (typically 1 μs) after which the memory can be accessed in normal read mode.
(minimum 1 ms or 4 ms).
(minimum 100 μs).
NOTES
NOTES
Freescale Semiconductor

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