s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 68

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Analog-to-Digital Converter (ADC)
3.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH4–ADCH0 — ADC Channel Select Bits
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In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
ADCH4–ADCH0 form a 5-bit field which is used to select one of 32 ADC channels. Only 24 channels,
AD23–AD0, are available on this MCU. The channels are detailed in
when using a port pin as both an analog and digital input simultaneously to prevent switching noise
from corrupting the analog signal. See
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Address:
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Recovery from the disabled state requires one conversion cycle to stabilize.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
$003C
COCO
Figure 3-4. ADC Status and Control Register (ADSCR)
Bit 7
R
R
0
= Reserved
AIEN
6
0
ADCO
Table
5
0
3-1.
NOTE
NOTE
ADCH4
4
1
ADCH3
3
1
ADCH2
2
1
Table
ADCH1
3-1. Care should be taken
1
1
Freescale Semiconductor
ADCH0
Bit 0
1