s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 275

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MSxB — Mode Select Bit B
MSxA — Mode Select Bit A
ELSxB and ELSxA — Edge/Level Select Bits
Freescale Semiconductor
This read/write bit selects buffered output compare/PWM operation. MSxB exists only in the TIM1
channel 0 status and control register.
Setting MS0B disables the channel 1 status and control register and reverts T1CH1 to general-purpose
I/O.
Reset clears the MSxB bit.
When ELSxB:A ≠ 00, this read/write bit selects either input capture operation or unbuffered output
compare/PWM operation. See
When ELSxB:A = 00, this read/write bit selects the initial output level of the TCHx pin (see
Reset clears the MSxA bit.
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
1 = Buffered output compare/PWM operation enabled
0 = Buffered output compare/PWM operation disabled
1 = Unbuffered output compare/PWM operation
0 = Input capture operation
1 = Initial output level low
0 = Initial output level high
MSxB
X
X
0
0
0
0
0
0
0
1
1
1
Before changing a channel function by writing to the MSxB or MSxA bit, set
the TSTOP and TRST bits in the TIM1 status and control register (T1SC).
MSxA
X
X
X
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
0
1
0
0
0
1
1
1
1
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
Table 18-2. Mode, Edge, and Level Selection
Table
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
18-2.
Output compare
buffered PWM
Output preset
Input capture
compare or
Buffered
or PWM
output
Mode
NOTE
Pin under port control; initial output level high
Pin under port control; initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Configuration
Input/Output Registers
Table
18-2).
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