s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 65

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Left justified sign data mode is similar to left justified mode with one exception. The MSB of the 10-bit
result, AD9 located in ADRH, is complemented. This mode of operation is useful when a result,
represented as a signed magnitude from mid-scale, is needed. Finally, 8-bit truncation mode will place
the eight MSBs in the ADC data register low, ADRL. The two LSBs are dropped. This mode of operation
is used when compatibility with 8-bit ADC designs are required. No interlocking between ADRH and ADRL
is present.
3.4 Monotonicity
The conversion process is monotonic and has no missing codes.
3.5 Interrupts
When the AIEN bit is set, the ADC module is capable of generating CPU interrupts after each ADC
conversion. A CPU interrupt is generated if the COCO bit is a 0. The COCO bit is not used as a conversion
complete flag when interrupts are enabled.
Freescale Semiconductor
Quantization error is affected when only the most significant eight bits are
used as a result. See
RESULT
003
002
001
000
8-BIT
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
RESULT
10-BIT
00B
00A
009
008
007
006
005
004
003
002
001
000
1/2
IDEAL 10-BIT CHARACTERISTIC
WITH QUANTIZATION = ±1/2
1 1/2
Figure 3-3. Bit Truncation Mode Error
IDEAL 8-BIT CHARACTERISTIC
WITH QUANTIZATION = ±1/2
1/2
2 1/2
Figure
3 1/2
4 1/2
3-3.
5 1/2
1 1/2
NOTE
6 1/2
7 1/2
8 1/2
9 1/2
WHEN TRUNCATION IS USED,
ERROR FROM IDEAL 8-BIT = 3/8 LSB
DUE TO NON-IDEAL QUANTIZATION.
2 1/2
INPUT VOLTAGE
REPRESENTED AS 10-BIT
INPUT VOLTAGE
REPRESENTED AS 8-BIT
10-BIT TRUNCATED
TO 8-BIT RESULT
Monotonicity
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