s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 272
s908gz60cfa
Manufacturer Part Number
s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908GZ60CFA.pdf
(352 pages)
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Timer Interface Module (TIM1)
TSTOP — TIM1 Stop Bit
TRST — TIM1 Reset Bit
PS[2:0] — Prescaler Select Bits
272
This read/write bit stops the TIM1 counter. Counting resumes when TSTOP is cleared. Reset sets the
TSTOP bit, stopping the TIM1 counter until software clears the TSTOP bit.
Setting this write-only bit resets the TIM1 counter and the TIM1 prescaler. Setting TRST has no effect
on any other registers. Counting resumes from $0000. TRST is cleared automatically after the TIM1
counter is reset and always reads as 0. Reset clears the TRST bit.
These read/write bits select one of the seven prescaler outputs as the input to the TIM1 counter as
Table 18-1
1 = TIM1 counter stopped
0 = TIM1 counter active
1 = Prescaler and TIM1 counter cleared
0 = No effect
shows. Reset clears the PS[2:0] bits.
Do not set the TSTOP bit before entering wait mode if the TIM1 is required
to exit wait mode. Also, when the TSTOP bit is set and the timer is
configured for input capture operation, input captures are inhibited until the
TSTOP bit is cleared.
Setting the TSTOP and TRST bits simultaneously stops the TIM1 counter
at a value of $0000.
PS2
0
0
0
0
1
1
1
1
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
PS1
0
0
1
1
0
0
1
1
Table 18-1. Prescaler Selection
PS0
0
1
0
1
0
1
0
1
NOTE
NOTE
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIM1 Clock Source
Not available
Freescale Semiconductor
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