s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 45

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

2.5 Random-Access Memory (RAM)
The RAM locations are broken into two non-continuous memory blocks. The RAM addresses locations
are $0040–$043F and $0580–$097F. The location of the stack RAM is programmable. The 16-bit stack
pointer allows the stack to be anywhere in the 64-Kbyte memory space.
Within page zero are 192 bytes of RAM. Because the location of the stack RAM is programmable, all page
zero RAM locations can be used for I/O control and user data or code. When the stack pointer is moved
from its reset location at $00FF out of page zero, direct addressing mode instructions can efficiently
access all page zero RAM locations. Page zero RAM, therefore, provides ideal locations for frequently
accessed global variables.
Before processing an interrupt, the CPU uses five bytes of the stack to save the contents of the CPU
registers.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
2.6 FLASH-1 Memory (FLASH-1)
This subsection describes the operation of the embedded FLASH-1 memory. This memory can be read,
programmed, and erased from a single external supply. The program and erase operations are enabled
through the use of an internal charge pump.
2.6.1 Functional Description
The FLASH-1 memory is an array of 32,256 bytes with two bytes of block protection (one byte for
protecting areas within FLASH-1 array and one byte for protecting areas within FLASH-2 array) and an
additional 52 bytes of user vectors. An erased bit reads as a 1 and a programmed bit reads as a 0.
Memory in the FLASH-1 array is organized into rows within pages. There are two rows of memory per
page with 64 bytes per row. The minimum erase block size is a single page,128 bytes. Programming is
performed on a per-row basis, 64 bytes at a time. Program and erase operations are facilitated through
control bits in the FLASH-1 control register (FL1CR). Details for these operations appear later in this
subsection.
The FLASH-1 memory map consists of:
Freescale Semiconductor
•
•
•
•
•
$8000–$FDFF: user memory (32,256 bytes)
$FF80: FLASH-1 block protect register (FL1BPR)
$FF81: FLASH-2 block protect register (FL2BPR)
$FF88: FLASH-1 control register (FL1CR)
$FFCC–$FFFF: these locations are reserved for user-defined interrupt and reset vectors (see
Table 2-1
For correct operation, the stack pointer must point only to RAM locations.
For M6805 compatibility, the H register is not stacked.
Be careful when using nested subroutines. The CPU may overwrite data in
the RAM during a subroutine or during the interrupt stacking operation.
for details)
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
NOTE
NOTE
NOTE
Random-Access Memory (RAM)
45