s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 292

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Timer Interface Module (TIM2)
PS[2:0] — Prescaler Select Bits
19.8.2 TIM2 Counter Registers
The two read-only TIM2 counter registers contain the high and low bytes of the value in the TIM2 counter.
Reading the high byte (T2CNTH) latches the contents of the low byte (T2CNTL) into a buffer. Subsequent
reads of T2CNTH do not affect the latched T2CNTL value until T2CNTL is read. Reset clears the TIM2
counter registers. Setting the TIM2 reset bit (TRST) also clears the TIM2 counter registers.
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These read/write bits select either the T2CH0 pin or one of the seven prescaler outputs as the input to
the TIM2 counter as
Address: $002C
Address: $002D
Setting the TSTOP and TRST bits simultaneously stops the TIM2 counter
at a value of $0000.
If T2CNTH is read during a break interrupt, be sure to unlatch T2CNTL by
reading T2CNTL before exiting the break interrupt. Otherwise, T2CNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 19-6. TIM2 Counter Registers (T2CNTH and T2CNTL)
BIT 15
BIT 7
Table 19-1
Bit 7
Bit 7
0
0
PS[2:0]
000
001
010
011
100
101
110
111
T2CNTH
T2CNTL
= Unimplemented
BIT 14
BIT 6
6
0
6
0
shows. Reset clears the PS[2:0] bits.
Table 19-1. Prescaler Selection
BIT 13
BIT 5
5
0
5
0
NOTE
NOTE
BIT 12
BIT 4
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
4
0
4
0
Internal bus clock ÷ 4
Internal bus clock ÷ 2
Internal bus clock ÷ 8
Internal bus clock ÷1
TIM2 Clock Source
T2CH0
BIT 11
BIT 3
3
0
3
0
BIT 10
BIT 2
2
0
2
0
BIT 9
BIT 1
1
0
1
0
Freescale Semiconductor
BIT 8
BIT 0
Bit 0
Bit 0
0
0