s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 304

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s908gz60cfa

Manufacturer Part Number
s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Development Support
20.2.2.3 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
20.2.2.4 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear status bits while the MCU
is in a break state.
BCFE — Break Clear Flag Enable Bit
20.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes. If enabled,
the break module will remain enabled in wait and stop modes. However, since the internal address bus
does not increment in these modes, a break interrupt will never be triggered.
304
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Status bits clearable during break
0 = Status bits not clearable during break
Address: $FE00
Address: $FE03
Reset:
Read:
Reset:
Write:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
BCFE
Bit 7
Bit 7
R
R
R
0
Figure 20-8. Break Flag Control Register (BFCR)
Figure 20-7. Break Status Register (BSR)
= Reserved
= Reserved
R
6
R
6
R
5
R
5
R
4
R
4
1. Writing a 0 clears SBSW.
R
3
R
3
R
2
R
2
Note
SBSW
1
0
R
1
(1)
Freescale Semiconductor
Bit 0
Bit 0
R
R

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