s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 271

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

18.7 Input/Output Signals
Port D shares two of its pins with the TIM1. The two TIM1 channel I/O pins are PTD4/T1CH0 and
PTD5/T1CH1.
Each channel I/O pin is programmable independently as an input capture pin or an output compare pin.
PTD4/T1CH0 can be configured as a buffered output compare or buffered PWM pin.
18.8 Input/Output Registers
The following I/O registers control and monitor operation of the TIM:
18.8.1 TIM1 Status and Control Register
The TIM1 status and control register (T1SC) does the following:
TOF — TIM1 Overflow Flag Bit
TOIE — TIM1 Overflow Interrupt Enable Bit
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This read/write flag is set when the TIM1 counter reaches the modulo value programmed in the TIM1
counter modulo registers. Clear TOF by reading the TIM1 status and control register when TOF is set
and then writing a 0 to TOF. If another TIM1 overflow occurs before the clearing sequence is complete,
then writing 0 to TOF has no effect. Therefore, a TOF interrupt request cannot be lost due to
inadvertent clearing of TOF. Reset clears the TOF bit. Writing a 1 to TOF has no effect.
This read/write bit enables TIM1 overflow interrupts when the TOF bit becomes set. Reset clears the
TOIE bit.
1 = TIM1 counter has reached modulo value
0 = TIM1 counter has not reached modulo value
1 = TIM1 overflow interrupts enabled
0 = TIM1 overflow interrupts disabled
TIM1 status and control register (T1SC)
TIM1 counter registers (T1CNTH:T1CNTL)
TIM1 counter modulo registers (T1MODH:T1MODL)
TIM1 channel status and control registers (T1SC0 and T1SC1)
TIM1 channel registers (T1CH0H:T1CH0L and T1CH1H:T1CH1L)
Enables TIM1 overflow interrupts
Flags TIM1 overflows
Stops the TIM1 counter
Resets the TIM1 counter
Prescales the TIM1 counter clock
Address: $0020
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Bit 7
TOF
Figure 18-5. TIM1 Status and Control Register (T1SC)
0
0
= Unimplemented
TOIE
6
0
TSTOP
5
1
TRST
4
0
0
3
0
0
PS2
2
0
PS1
1
0
Input/Output Signals
Bit 0
PS0
0
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