s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 198

no-image

s908gz60cfa

Manufacturer Part Number
s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
s908gz60cfaE
Manufacturer:
FREESCALE
Quantity:
1 780
Part Number:
s908gz60cfaE
Manufacturer:
FREESCALE
Quantity:
1 780
Part Number:
s908gz60cfaE
Manufacturer:
FREESCALE
Quantity:
8 000
Part Number:
s908gz60cfaE
Manufacturer:
FREESCALE
Quantity:
20 000
Enhanced Serial Communications Interface (ESCI) Module
14.4.3.2 Character Reception
During an ESCI reception, the receive shift register shifts characters in from the RxD pin. The ESCI data
register (SCDR) is the read-only buffer between the internal data bus and the receive shift register.
After a complete character shifts into the receive shift register, the data portion of the character transfers
to the SCDR. The ESCI receiver full bit, SCRF, in ESCI status register 1 (SCS1) becomes set, indicating
that the received byte can be read. If the ESCI receive interrupt enable bit, SCRIE, in SCC2 is also set,
the SCRF bit generates a receiver CPU interrupt request.
14.4.3.3 Data Sampling
The receiver samples the RxD pin at the RT clock rate. The RT clock is an internal signal with a frequency
16 times the baud rate. To adjust for baud rate mismatch, the RT clock is resynchronized at these times
(see
To locate the start bit, data recovery logic does an asynchronous search for a 0 preceded by three 1s.
When the falling edge of a possible start bit occurs, the RT clock begins to count to 16.
To verify the start bit and to detect noise, data recovery logic takes samples at RT3, RT5, and RT7.
14-2
198
Figure
summarizes the results of the start bit verification samples.
After every start bit
After the receiver detects a data bit change from 1 to 0 (after the majority of data bit samples at
RT8, RT9, and RT10 returns a valid 1 and the majority of the next RT8, RT9, and RT10 samples
returns a valid 0)
14-7):
RT CLOCK
RT CLOCK
SAMPLES
CLOCK
RESET
STATE
RxD
RT
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
RT3, RT5, and RT7 Samples
Figure 14-7. Receiver Data Sampling
000
001
010
011
100
101
110
111
QUALIFICATION
Table 14-2. Start Bit Verification
START BIT
VERIFICATION
START BIT
Start Bit Verification
START BIT
Yes
Yes
Yes
Yes
No
No
No
No
SAMPLING
DATA
Noise Flag
0
1
1
0
1
0
0
0
Freescale Semiconductor
LSB
Table

Related parts for s908gz60cfa