s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 71

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

3.8.2.3 Left Justified Signed Data Mode
In left justified signed data mode, the ADRH register holds the eight MSBs of the 10-bit result. The only
difference from left justified mode is that the AD9 is complemented. The ADRL register holds the two
LSBs of the 10-bit result. All other bits read as 0. ADRH and ADRL are updated each time an ADC single
channel conversion completes. Reading ADRH latches the contents of ADRL until ADRL is read. All
subsequent results will be lost until the ADRH and ADRL reads are completed.
3.8.2.4 Eight Bit Truncation Mode
In 8-bit truncation mode, the ADRL register holds the eight MSBs of the 10-bit result. The ADRH register
is unused and reads as 0. The ADRL register is updated each time an ADC single channel conversion
completes. In 8-bit mode, the ADRL register contains no interlocking with ADRH.
Freescale Semiconductor
Address:
Address:
Address:
Address:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 3-7. ADC Data Register High (ADRH) and Low (ADRL)
Figure 3-8. ADC Data Register High (ADRH) and Low (ADRL)
$003D
$003E
$003D
$003E
Bit 7
AD9
AD1
Bit 7
AD9
0
= Unimplemented
= Unimplemented
AD8
AD0
AD8
6
6
0
AD7
AD7
5
0
5
0
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
AD6
AD6
4
0
4
0
AD5
AD5
3
0
3
0
AD4
AD4
2
0
2
0
AD3
AD3
1
0
1
0
ADRH
ADRL
Bit 0
AD2
Bit 0
AD2
0
0
I/O Registers
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