s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 293
s908gz60cfa
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s908gz60cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.S908GZ60CFA.pdf
(352 pages)
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19.8.3 TIM2 Counter Modulo Registers
The read/write TIM2 modulo registers contain the modulo value for the TIM2 counter. When the TIM2
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM2 counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (T2MODH) inhibits the TOF bit and
overflow interrupts until the low byte (T2MODL) is written. Reset sets the TIM2 counter modulo registers.
19.8.4 TIM2 Channel Status and Control Registers
Each of the TIM2 channel status and control registers:
Freescale Semiconductor
•
•
•
•
•
•
•
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Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Selects output toggling on TIM2 overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Address: $002E
Address: $002F
Address: $0030
Reset the TIM2 counter before writing to the TIM2 counter modulo registers.
Figure 19-7. TIM2 Counter Modulo Registers (T2MODH and T2MODL)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Bit 7
Figure 19-8. TIM2 Channel Status and Control Registers
BIT 15
CH0F
BIT 7
Bit 7
Bit 7
1
1
0
0
T2MODH
T2MODL
T2SC0
6
= Unimplemented
BIT 14
CH0IE
BIT 6
6
1
6
1
0
5
BIT 13
MS0B
BIT 5
5
1
5
1
0
(T2SC0:T2SC5)
4
NOTE
BIT 12
MS0A
BIT 4
4
1
4
1
0
3
ELS0B
BIT 11
BIT 3
3
1
3
1
0
2
ELS0A
BIT 10
BIT 2
2
1
2
1
0
TOV0
BIT 9
BIT 1
1
1
1
1
1
0
CH0MAX
BIT 0
BIT 8
Bit 0
Bit 0
Bit 0
1
1
0
I/O Registers
293
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