s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 140

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

MSCAN08 Controller (MSCAN08)
To transmit a message, the CPU08 has to identify an available transmit buffer which is indicated by a set
transmit buffer empty (TXE) flag in the MSCAN08 transmitter flag register (CTFLG) (see
MSCAN08 Transmitter Flag
The CPU08 then stores the identifier, the control bits and the data content into one of the transmit buffers.
Finally, the buffer has to be flagged ready for transmission by clearing the TXE flag.
The MSCAN08 then will schedule the message for transmission and will signal the successful
transmission of the buffer by setting the TXE flag. A transmit interrupt is generated
can be used to drive the application software to re-load the buffer.
In case more than one buffer is scheduled for transmission when the CAN bus becomes available for
arbitration, the MSCAN08 uses the local priority setting of the three buffers for prioritization. For this
purpose, every transmit buffer has an 8-bit local priority field (PRIO). The application software sets this
field when the message is set up. The local priority reflects the priority of this particular message relative
to the set of messages being emitted from this node. The lowest binary value of the PRIO field is defined
as the highest priority.
The internal scheduling process takes place whenever the MSCAN08 arbitrates for the bus. This is also
the case after the occurrence of a transmission error.
When a high priority message is scheduled by the application software, it may become necessary to abort
a lower priority message being set up in one of the three transmit buffers. As messages that are already
under transmission cannot be aborted, the user has to request the abort by setting the corresponding
abort request flag (ABTRQ) in the transmission control register (CTCR). The MSCAN08 will then grant
the request, if possible, by setting the corresponding abort request acknowledge (ABTAK) and the TXE
flag in order to release the buffer and by generating a transmit interrupt. The transmit interrupt handler
software can tell from the setting of the ABTAK flag whether the message was actually aborted
(ABTAK = 1) or sent (ABTAK = 0).
12.5 Identifier Acceptance Filter
The identifier acceptance registers (CIDAR0–CIDAR3) define the acceptance patterns of the standard or
extended identifier (ID10–ID0 or ID28–ID0). Any of these bits can be marked ‘don’t care’ in the identifier
mask registers (CIDMR0–CIDMR3).
A filter hit is indicated to the application on software by a set RXF (receive buffer full flag, see
MSCAN08 Receiver Flag Register
12.13.9 MSCAN08 Identifier Acceptance Control
clearly identify the filter section that caused the acceptance. They simplify the application software’s task
to identify the cause of the receiver interrupt. In case that more than one hit occurs (two or more filters
match) the lower hit has priority.
A very flexible programmable generic identifier acceptance filter has been introduced to reduce the CPU
interrupt loading. The filter is programmable to operate in four different modes:
1. The transmit interrupt will occur only if not masked. A polling scheme can be applied on TXE also.
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1. Single identifier acceptance filter, each to be applied to a) the full 29 bits of the extended identifier
and to the following bits of the CAN frame: RTR, IDE, SRR or b) the 11 bits of the standard identifier
plus the RTR and IDE bits of CAN 2.0A/B messages. This mode implements a single filter for a full
length CAN 2.0B compliant extended identifier.
(CIDAR0-3, CIDMR0-3) produces a filter 0 hit.
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Register).
(CRFLG)) and two bits in the identifier acceptance control register (see
Register). These identifier hit flags (IDHIT1 and IDHIT0)
Figure 12-4
shows how the 32-bit filter bank
(1)
Freescale Semiconductor
when TXE is set and
12.13.7
12.13.5