s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 231

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

15.5.1.2 SWI Instruction
The SWI instruction is a non-maskable instruction that causes an interrupt regardless of the state of the
interrupt mask (I bit) in the condition code register.
15.5.1.3 Interrupt Status Registers
The flags in the interrupt status registers identify maskable interrupt sources.
interrupt sources, hardware flag bits, hardware interrupt mask bits, interrupt status register flags, interrupt
priority, and exception vectors. The interrupt status registers can be useful for debugging.
Interrupt Status Register 1
IF6–IF1 — Interrupt Flags 1–6
Bit 0 and Bit 1 — Always read 0
Freescale Semiconductor
These flags indicate the presence of interrupt requests from the sources shown in
1 = Interrupt request present
0 = No interrupt request present
Address:
A software interrupt pushes PC onto the stack. A software interrupt does
not push PC – 1, as a hardware interrupt does.
Reset:
Read:
Write:
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
$FE04
Bit 7
IF6
R
R
0
INT1
INT2
Figure 15-12. Interrupt Status Register 1 (INT1)
Figure 15-11
= Reserved
IF5
R
6
0
CLI
LDA
PSHH
PULH
RTI
PSHH
PULH
RTI
#$FF
.
IF4
R
5
0
Interrupt Recognition Example
NOTE
IF3
R
4
0
INT1 INTERRUPT SERVICE ROUTINE
INT2 INTERRUPT SERVICE ROUTINE
IF2
R
3
0
IF1
R
2
0
BACKGROUND
ROUTINE
Table 15-3
R
1
0
0
Table
Bit 0
R
0
0
Exception Control
summarizes the
15-3.
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