s908gz60cfa Freescale Semiconductor, Inc, s908gz60cfa Datasheet - Page 47

• Manufacturer Part Number: s908gz60cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

2.6.2.2 FLASH-1 Block Protect Register
The FLASH-1 block protect register (FL1BPR) is implemented as a byte within the FLASH-1 memory;
therefore, it can only be written during a FLASH programming sequence. The value in this register
determines the starting location of the protected range within the FLASH-1 memory.
FL1BPR[7:0] — Block Protect Register Bits 7 to 0
Decreasing the value in FL1BPR by one increases the protected range by one page (128 bytes).
However, programming the block protect register with $FE protects a range twice that size, 256 bytes, in
the corresponding array. $FE means that locations $FF00–$FFFF are protected in FLASH-1.
The FLASH memory does not exist at some locations. The block protection range configuration is
unaffected if FLASH memory does not exist in that range. Refer to
desired locations are protected.
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These eight bits represent bits [14:7] of a 16-bit memory address. Bit 15 is a 1 and bits [6:0] are 0s.
The resultant 16-bit address is used for specifying the start address of the FLASH-1 memory for block
protection. FLASH-1 is protected from this start address to the end of FLASH-1 memory at $FFFF.
With this mechanism, the protect start address can be $XX00 and $XX80 (128 byte page boundaries)
within the FLASH-1 array.
Address: $FF80
Read:
Write:
START ADDRESS OF FLASH
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
Figure 2-4. FLASH-1 Block Protect Register (FL1BPR)
BPR7
Bit 7
BLOCK PROTECT
Figure 2-5. FLASH-1 Block Protect Start Address
FL1BPR[7:0]
$FF
$FE
$FD
$0B
$0A
Table 2-2. FLASH-1 Protected Ranges
$09
$08
$04
$03
$02
$01
$00
BPR6
↓
↓
6
1
BPR5
5
FLBPR VALUE
16-BIT MEMORY ADDRESS
Unaffected by reset
BPR4
4
Protected Range
$FF00–$FFFF
$FE80–$FFFF
$8580–$FFFF
$8500–$FFFF
$8480–$FFFF
$8400–$FFFF
$8200–$FFFF
$8180–$FFFF
$8100–$FFFF
$8080–$FFFF
$8000–$FFFF
No protection
BPR3
3
↓
↓
0 0 0 0 0 0 0
Figure 2-1
BPR2
2
BPR1
and make sure that the
1
FLASH-1 Memory (FLASH-1)
BPR0
Bit 0
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