C8051F060_07 SILABS [Silicon Laboratories], C8051F060_07 Datasheet - Page 113

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C8051F060_07

Manufacturer Part Number
C8051F060_07
Description
Mixed Signal ISP Flash MCU Family
Manufacturer
SILABS [Silicon Laboratories]
Datasheet
10.
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The internal reference may be routed via the VREF pin
to external system components or to the VREF2 input pin shown in Figure 10.1. The maximum load seen
by the VREF pin must be less than 200 µA to AGND. Bypass capacitors of 0.1 µF and 4.7 µF are recom-
mended from the VREF pin to AGND, as shown in Figure 10.1.
The VREF2 pin provides a voltage reference input for ADC2 and the DACs. ADC2 may also reference the
analog power supply voltage, via the VREF multiplexers shown in Figure 10.1.
The Reference Control Register 2, REF2CN (defined in Figure 10.2) enables/disables the internal refer-
ence generator and selects the reference input for ADC2. The BIASE bit in REF2CN enables the on-board
reference generator while the REFBE bit enables the gain-of-two buffer amplifier which drives the VREF
pin. When disabled, the supply current drawn by the bandgap and buffer amplifier falls to less than 1 µA
(typical) and the output of the buffer amplifier enters a high impedance state. If the internal bandgap is
used as the reference voltage generator, BIASE and REFBE must both be set to logic 1. If the internal ref-
erence is not used, REFBE may be set to logic 0. Note that the BIASE bit must be set to logic 1 if ADC2 or
either DAC is used, regardless of the voltage reference used. If neither ADC2 nor the DACs are being
used, both of these bits can be set to logic 0 to conserve power. Bit AD2VRS selects between VREF2 and
AV+ for the ADC2 voltage reference source. The electrical specifications for the Voltage Reference are
given in Table 10.1.
Voltage Reference 2 (C8051F061/3)
Reference
External
Voltage
Circuit
VDD
Figure 10.1. Voltage Reference Functional Block Diagram
Recommended Bypass
4.7µF
R
Capacitors
+
0.1µF
VREF2
VREF
Rev. 1.2
REF2CN
C8051F060/1/2/3/4/5/6/7
DAC0
DAC1
Ref
REFBE
x2
AV+
1
0
Band-Gap
BIASE
1.2V
EN
ADC2
Ref
Bias to
ADC2,
DACs
113

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